Tree-based heterogeneous FPGA architectures: application specific exploration and optimization
(eBook)
Author:
Published:
New York, NY : Springer, ©2012., New York, NY : Springer, [2012].
Format:
eBook
ISBN:
9781461435945, 1461435943, 1461435935, 9781461435938
Content Description:
1 online resource (xvi, 186 pages)
Status:
Available Online
Description
This book presents a new FPGA architecture known as tree-based FPGA architecture, due to its hierarchical nature. This type of architecture has been relatively unexplored despite their better performance and predictable routing behavior, as compared to mesh-based FPGA architectures. In this book, we explore and optimize the tree-based architecture and we evaluate it by comparing it to equivalent mesh-based FPGA architectures. Provides a single-source reference, surveying and comparing mesh and tree-based FPGA architectures, including exploration of a number of techniques for both architectures and comparison using a large set of benchmarks; Describes in detail Computer-Aided-Design (CAD) flow of FPGAs which is used to map different circuits; Includes a survey of the current and future trends in FPGA design.
Copies
CCU Electronic Resources
Subjects
LC Subjects
Bisac Subjects
OCLC Fast Subjects
Citations
APA Citation (style guide)
Farooq, U., Marrakchi, Z., & Mehrez, H. (2012). Tree-based heterogeneous FPGA architectures: application specific exploration and optimization. New York, NY, Springer.
Chicago / Turabian - Author Date Citation (style guide)Farooq, Umer, Zied. Marrakchi and Habib. Mehrez. 2012. Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization. New York, NY, Springer.
Chicago / Turabian - Humanities Citation (style guide)Farooq, Umer, Zied. Marrakchi and Habib. Mehrez, Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization. New York, NY, Springer, 2012.
MLA Citation (style guide)Farooq, Umer, et al. Tree-based Heterogeneous FPGA Architectures: Application Specific Exploration and Optimization. New York, NY, Springer, 2012.
Note! Citation formats are based on standards as of July 2022. Citations contain only title, author, edition, publisher, and year published. Citations should be used as a guideline and should be double checked for accuracy.
More Copies In Prospector
Loading Prospector Copies...
More Details
Language:
English
Notes
Bibliography
Includes bibliographical references.
Description
This book presents a new FPGA architecture known as tree-based FPGA architecture, due to its hierarchical nature. This type of architecture has been relatively unexplored despite their better performance and predictable routing behavior, as compared to mesh-based FPGA architectures. In this book, we explore and optimize the tree-based architecture and we evaluate it by comparing it to equivalent mesh-based FPGA architectures. Provides a single-source reference, surveying and comparing mesh and tree-based FPGA architectures, including exploration of a number of techniques for both architectures and comparison using a large set of benchmarks; Describes in detail Computer-Aided-Design (CAD) flow of FPGAs which is used to map different circuits; Includes a survey of the current and future trends in FPGA design.
Staff View
Grouped Work ID:
2be88f4a-2054-3014-de3d-086ac7fb790d
Record Information
| Last Sierra Extract Time | Mar 20, 2024 05:20:14 PM |
|---|---|
| Last File Modification Time | Mar 20, 2024 05:27:10 PM |
| Last Grouped Work Modification Time | Mar 20, 2024 05:20:21 PM |
MARC Record
| LEADER | 05959cam a2201081 a 4500 | ||
|---|---|---|---|
| 001 | 794056006 | ||
| 003 | OCoLC | ||
| 005 | 20240223121953.0 | ||
| 006 | m o d | ||
| 007 | cr cnu---unuuu | ||
| 008 | 120522s2012 nyu ob 000 0 eng d | ||
| 010 | |z 2012937466 | ||
| 019 | |a 840461299|a 985035783|a 1005750288|a 1026461783|a 1111046075|a 1204073054|a 1360075002 | ||
| 020 | |a 9781461435945|q (electronic bk.) | ||
| 020 | |a 1461435943|q (electronic bk.) | ||
| 020 | |a 1461435935 | ||
| 020 | |a 9781461435938 | ||
| 020 | |z 9781461435938 | ||
| 035 | |a (OCoLC)794056006|z (OCoLC)840461299|z (OCoLC)985035783|z (OCoLC)1005750288|z (OCoLC)1026461783|z (OCoLC)1111046075|z (OCoLC)1204073054|z (OCoLC)1360075002 | ||
| 037 | |b Springer | ||
| 040 | |a GW5XE|b eng|e pn|c GW5XE|d ZMC|d COO|d E7B|d YDXCP|d OCLCQ|d N$T|d NLGGC|d OCLCF|d BEDGE|d OCLCA|d OCLCO|d DEBSZ|d OCLCO|d NUI|d OCLCQ|d OCLCO|d KMS|d OCLCO|d OCLCQ|d VT2|d Z5A|d ESU|d IOG|d REB|d CEF|d U3W|d WYU|d YOU|d TKN|d LEAUB|d UKAHL|d OL$|d OCLCQ|d WURST|d AJS|d DCT|d OCLCQ|d OCLCO|d OCLCQ|d INARC|d OCLCO|d OCLCL | ||
| 049 | |a COM6 | ||
| 050 | 4 | |a TK7895.G36|b F37 2012 | |
| 072 | 7 | |a TEC|x 008010|2 bisacsh | |
| 072 | 7 | |a TEC|x 008020|2 bisacsh | |
| 082 | 0 | 4 | |a 621.3815|2 23 |
| 100 | 1 | |a Farooq, Umer|c (Electrical engineer)|0 https://id.loc.gov/authorities/names/nb2012020957 | |
| 245 | 1 | 0 | |a Tree-based heterogeneous FPGA architectures :|b application specific exploration and optimization /|c Umer Farooq, Zied Marrakchi, Habib Mehrez. |
| 260 | |a New York, NY :|b Springer,|c ©2012. | ||
| 264 | 1 | |a New York, NY :|b Springer,|c [2012] | |
| 264 | 4 | |c ©2012 | |
| 300 | |a 1 online resource (xvi, 186 pages) | ||
| 336 | |a text|b txt|2 rdacontent | ||
| 337 | |a computer|b c|2 rdamedia | ||
| 338 | |a online resource|b cr|2 rdacarrier | ||
| 347 | |a text file | ||
| 347 | |b PDF | ||
| 504 | |a Includes bibliographical references. | ||
| 505 | 0 | 0 | |t Introduction --|t FPGA Architectures: An Overview --|t Homogeneous Architectures Exploration Environments --|t Heterogeneous Architectures Exploration Environments --|t Tree-Based Application Specific Inflexible FPGA --|t Tree-Based ASIF Using Heterogeneous Blocks --|t Conclusion and Future Lines of Research. |
| 520 | |a This book presents a new FPGA architecture known as tree-based FPGA architecture, due to its hierarchical nature. This type of architecture has been relatively unexplored despite their better performance and predictable routing behavior, as compared to mesh-based FPGA architectures. In this book, we explore and optimize the tree-based architecture and we evaluate it by comparing it to equivalent mesh-based FPGA architectures. Provides a single-source reference, surveying and comparing mesh and tree-based FPGA architectures, including exploration of a number of techniques for both architectures and comparison using a large set of benchmarks; Describes in detail Computer-Aided-Design (CAD) flow of FPGAs which is used to map different circuits; Includes a survey of the current and future trends in FPGA design. | ||
| 650 | 0 | |a Field programmable gate arrays.|0 https://id.loc.gov/authorities/subjects/sh93009062 | |
| 650 | 0 | |a Application-specific integrated circuits|x Design and construction.|0 https://id.loc.gov/authorities/subjects/sh2009115143 | |
| 650 | 6 | |a Réseaux logiques programmables par l'utilisateur. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING|x Electronics|x Circuits|x General.|2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING|x Electronics|x Circuits|x Integrated.|2 bisacsh | |
| 650 | 7 | |a Ingénierie.|2 eclas | |
| 650 | 7 | |a Application-specific integrated circuits|x Design and construction.|2 fast | |
| 650 | 7 | |a Field programmable gate arrays.|2 fast | |
| 653 | 4 | |a Engineering. | |
| 653 | 4 | |a Computer science. | |
| 653 | 4 | |a Electronics. | |
| 653 | 4 | |a Systems engineering. | |
| 653 | 4 | |a Circuits and Systems. | |
| 653 | 4 | |a Electronics and Microelectronics, Instrumentation. | |
| 653 | 4 | |a Processor Architectures. | |
| 653 | 0 | 0 | |a elektronica |
| 653 | 0 | 0 | |a instrumentatie |
| 653 | 0 | 0 | |a instrumentation |
| 653 | 0 | 0 | |a circuits |
| 653 | 0 | 0 | |a procesarchitectuur |
| 653 | 0 | 0 | |a process architecture |
| 653 | 1 | 0 | |a Engineering (General) |
| 653 | 1 | 0 | |a Techniek (algemeen) |
| 700 | 1 | |a Marrakchi, Zied.|0 https://id.loc.gov/authorities/names/nb2012020965 | |
| 700 | 1 | |a Mehrez, Habib.|0 https://id.loc.gov/authorities/names/nb2011024884 | |
| 710 | 2 | |a SpringerLink (Online service)|0 https://id.loc.gov/authorities/names/no2005046756 | |
| 776 | 0 | 8 | |i Print version:|a Farooq, Umer (Electrical engineer).|t Tree-based heterogeneous FPGA architectures.|d New York, NY : Springer, ©2012|w (DLC) 2012937466 |
| 907 | |a .b35555014 | ||
| 948 | |a MARCIVE Overnight, in 2024.03 | ||
| 948 | |a MARCIVE Comp, in 2022.12 | ||
| 948 | |a MARCIVE Over, 07/2021 | ||
| 948 | |a MARCIVE Comp, 2019.12 | ||
| 948 | |a MARCIVE Comp, 2018.05 | ||
| 948 | |a MARCIVE August, 2017 | ||
| 948 | |a MARCIVE extract Aug, 5 2017 | ||
| 989 | |1 .i71739749|d cceb|g j|m |h 0|x 0|t 0|i 0|j 188|k 120614|o -|w SpringerLink CCU Owned|u http://ezproxy.ccu.edu/login?url=http://dx.doi.org/10.1007/978-1-4614-3594-5 | ||
| 989 | |1 .i150314401|d cueme|g -|m |h 0|x 0|t 0|i 0|j 200|k 240227|o -|w SpringerLink|u http://ezproxy.coloradomesa.edu/login?url=https://link.springer.com/10.1007/978-1-4614-3594-5 | ||
| 994 | |a 92|b COM | ||
| 995 | |a Loaded with m2btab.ltiac in 2024.03 | ||
| 995 | |a Loaded with m2btab.elec in 2024.02 | ||
| 995 | |a Loaded with m2btab.ltiac in 2022.12 | ||
| 995 | |a Loaded with m2btab.ltiac in 2021.07 | ||
| 995 | |a Loaded with m2btab.elec in 2021.06 | ||
| 995 | |a Loaded with m2btab.ltiac in 2019.12 | ||
| 995 | |a Loaded with m2btab.ltiac in 2018.06 | ||
| 995 | |a Loaded with m2btab.ltiac in 2017.08 | ||
| 995 | |a Loaded with m2btab.elec in 2016 | ||
| 995 | |a Loaded with m2btab.elec in 2016 | ||
| 995 | |a OCLC offline update by CMU | ||
| 998 | |a (3)cue|a cc|a cu|b 240227|c m|d z |e -|f eng|g nyu|h 0|i 3 | ||
| 998 | |e -|f eng|a cue|a cc|a cu | ||
| 999 | |e z | ||
| 999 | |a cue | ||
